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Microchip Technology /ATSAMV70Q20 /MPU /CTRL

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Interpret as CTRL

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (ENABLE)ENABLE 0 (HFNMIENA)HFNMIENA 0 (PRIVDEFENA)PRIVDEFENA

Description

MPU Control Register

Fields

ENABLE

Enables the MPU
HFNMIENA

Enables the operation of MPU during hard fault, NMI, and FAULTMASK handlers.
PRIVDEFENA

Enables privileged software access to the default memory map.

Links

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data